The 8085 microprocessor has 8 signal line, A₁₅ – A₈ which are uni directional and used as a high order address bus.

The signal line AD7 – AD0 are bi-directional for dual purpose. They are used as low order address bus as well as data bus.

Control Signal

RD bar − It is a read control signal (active low). If it is active then memory read the data.

WR bar − It is write control signal (active low). It is active when written into selected memory.

Status signal

ALU (Address Latch Enable) − When ALU is high. 8085 microprocessor use address bus. When ALU is low. 8085 microprocessor is use data bus.

IO/M bar − This is a status signal used to differentiate between i/o and memory operations. When it is high, it indicate an i/o operation and when it is low, it indicate memory operation.

S₁ and S₀ − These status signals, similar to i/o and memory bar, can identify various operations, but they are rarely used in small system.

V_cc − +5v power supply.

V_ss − ground reference.

X, X − A crystal is connected at these two pins. The frequency is internally divided by two operate system at 3-MHz, the crystal should have a frequency of 6-MHz.

CLK out − This signal can be used as the system clock for other devices.

INTR (i/p) − Interrupt request.

INTA bar (o/p) − It is used as acknowledge interrupt.

TRAP (i/p) − This is non maskable interrupt and has highest priority.

HOLD (i/p) − It is used to hold the executing program.

HLDA (o/p) − Hold acknowledge.

READY (i/p) − This signal is used to delay the microprocessor read or write cycle until a slow responding peripheral is ready to accept or send data.

RESET IN bar − When the signal on this pin goes low, the program counter is set to zero, the bus are tri-stated, & MPU is reset.

RESET OUT − This signal indicate that MPU is being reset. The signal can be used to reset other devices.

RST 7.5, RST 6.5, RST 5.5 (Request interrupt) − It is used to transfer the program control to specific memory location. They have higher priority than INTR interrupt.

The 8085 microprocessor has two signals to implement the serial transmission serial input data and serial output data.